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may 2014 docid024214 rev 1 1/46 AN4248 application note 60 w psu design details for water purifier system harjeet singh introduction this power supply is based on quasi-resonant mode of operation using st multi-mode controller l6566b. the l6566b is an extremely versatile current-mode primary controller ic, specifically designed for high-performance offline flyback converters. both fixed-frequency (ff) and quasi-resonant (qr) operation are supported. the user can pick either of the two, depending on application needs. the device features an externally programmable oscillator: it defines the converter's switching frequency in ff mode and the maximum allowed switching frequency in qr mode. when ff operation is selected, the ic works like a standard current-mode controller with a maximum duty cycle limited at 70% min. the oscillator frequency can be modulated to mitigate emi emissions. qr operation, when selected, occurs at heavy load and is achieved through a transformer demagnetization sensing input that triggers mosfet turn- on. under some conditions, zvs (zero-voltage switching) can be achieved. the converter's power capability increasing with the mains voltage is compensated by line voltage feed- forward. at medium and light load, as the qr operating frequency equals the oscillator frequency, a function (valley skipping) is activated to prevent further frequency rise and keep the operation as close to zvs as possible. with either ff or qr operation, at very light load the ic enters a controlled burst-mode operation, to help keep consumption from the mains low and meet energy saving recommendations. the protection functions included in this device are: not-latched input undervoltage (brownout), output ovp (auto-restart or latch-mode selectable), a first-level ocp with delayed shutdown to protect the system during overload or short-circuit conditions (auto restart or latch-mode selectable) and a second-level ocp that is invoked when the transformer saturates or the secondary diode fails short. a dedicated pin to latch the controller in any abnormal condition is also provided. the main features of the controller are listed here: ? selectable multi-mode operation: fixed frequency or quasi-resonant ? on-board 700 v high-voltage startup ? advanced light load management ? low quiescent current (< 3 ma) ? adaptive uvlo ? line feed-forward for constant power capability vs. mains voltage ? pulse-by-pulse ocp, shutdown on overload (latched or auto restart) ? transformer saturation detection ? programmable frequency modulation for emi reduction ? latched or auto restart ovp ? brownout protection www.st.com
contents AN4248 2/46 docid024214 rev 1 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 ac_ok setting for brownout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 mains feed-forward setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 mains overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 overload delay and shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 overtemperature shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 output overvoltage protection (zcd setting) . . . . . . . . . . . . . . . . . . . . 13 9 basic power stage calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10 transformer specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.1 general description and characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.3 winding details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.4 winding construction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 11 control loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 12 schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 13 bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 14 test results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 15 functional check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 16 holdup test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
docid024214 rev 1 3/46 AN4248 contents 17 soft start test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 18 short-circuit test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 19 burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 20 temperature rise test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 21 reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 22 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
list of figures AN4248 4/46 docid024214 rev 1 list of figures figure 1. l6566b block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. brownout protection: internal block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. l6566b mains feed-forward section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. power capability change vs. input voltage in qr flyback converters . . . . . . . . . . . . . . . . . . 8 figure 5. mains overvoltage shutdown implementation using ac_ok pin . . . . . . . . . . . . . . . . . . . . 10 figure 6. overload delay circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 7. power discrete thermal shutdown using the dis pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 8. output overvoltage setting using z the cd pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. transformer windings & termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 10. transformer winding construction method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 11. magnitude and phase plot at 230 v ac , full load 60 w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 12. magnitude and phase plot at 230 v ac , light load 6 w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 13. magnitude and phase plot at 115 v ac , full load 60 w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 14. magnitude and phase plot at 115 v ac , light load 6 w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 15. electrical schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 16. condition 1: v ac = 100 v; i out = 0.6 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 17. condition 2: v ac = 100 v; i out = 1.2 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 18. condition 3: v ac = 100 v; i out = 1.8 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 19. condition 4: v ac = 100 v; i out = 2.4 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 20. condition 5: v ac = 180 v; i out = 0.6 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 21. condition 6: v ac = 180 v; i out = 1.2 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 22. condition 7: v ac = 180 v; i out = 1.8 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 23. condition 8: v ac = 180 v; i out = 2.4 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 24. condition 9: v ac = 230 v; i out = 0.6 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 25. condition 10: v ac = 230 v; i out = 1.2 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 26. condition 11: v ac = 230 v; i out = 1.8 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 27. condition 12: v ac = 230 v; i out = 2.4 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 28. condition 13: v ac = 265 v; i out = 0.6 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 29. condition 14: v ac = 265 v; i out = 1.2 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 30. condition 15: v ac = 265 v; i out = 1.8 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 31. condition 16: v ac = 265 v; i out = 2.4 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 figure 32. hold up test ch1: load current 2.4 a max; ch4: ac input 230 v. . . . . . . . . . . . . . . . . . . . 37 figure 33. output soft start ch1: load current; ch2: output voltage, 24 vmax . . . . . . . . . . . . . . . . . . 38 figure 34. output short circuit (hiccup mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 figure 35. switching attempts during hiccup mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 figure 36. single switching pulse (v drain and i drain ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 figure 37. single switching pulse-no saturation of transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 figure 38. burst mode operation at 100 v ac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 figure 39. burst mode operation at 265 v ac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
docid024214 rev 1 5/46 AN4248 block diagram 1 block diagram figure 1. l6566b block diagram =(52 &855 (17 '(7(&725 p9 p9 9 && =&' &6 *' 9 9 ',6 /$7&+ /(% 9 5hihuhqfh yrowdjhv 9 && ,qwhuqdo vxsso\ 95() 89/2 92/7$*( 5(*8/$725 $'$37,9( 89/2 )02' ,&b/$7&+ ',6$%/( 89/2 4 9 9 $&b2. $&b)$,/ 89/2b6+) 9 && 9 +9 62)767$57 )$8/7 01*7 66 26& 02'(6& 26&,//$725 5 6 4 02'( 6(/(&7,21 785121 /2*,& 29(592/7$*( 3527(&7,21 ?$ 9 2&3 3:0 7,0( 287 7,0( 287 9wk %856702'( 2)) , fkdujh +lffxsprgh 2&3 orjlf 9 x$ '5,9(5 2&3 9 9 && p$ 293/ 293 293/ 293 &203 9)) /2: &/$03 ',6$%/( 2)) /,1( 92/7$*( )((')25:$5' *1' 6riwvwduwdqg2/3ghod\ ,qsxwyrowdjhihhgiruzduglqsxw 3xovhe\sxovh2&3 +lffxsprgh /dwfkhgghylfh surwhfwlrq +9vwduwxsfxuuhqw jhqhudwru )uhtxhqf\prgxodwlrq 45ru))vhwwlqj vorshfrps =&' 293 %urzqrxw
electrical specifications AN4248 6/46 docid024214 rev 1 2 electrical specifications table 1. electrical specifications parameters limits min operating voltage, v acmin 90 v ac max operating voltage, v acmax 265 v ac mains overvoltage detection overvoltage shutdown above 300 v ac converter should withstand 440 v ac mains frequency, fl 50 hz+/-3 hz input / output isolation yes, galvanic isolation, > 2.7 k v nominal output voltage, v out 24 v+/-0.2 v total output power, p out 60 w typical efficiency at 230 v ac > 85% output voltage pk-pk ripple < 150 mv protection features mains brownout protection-auto restart mains overvoltage protection-auto restart/latched overload and short-circuit protection-auto restart output overvoltage protection-auto restart/latched over temperature shutdown-latched topology q-resonant flyback converter reflected voltage of transformer (vr) 140 v max ambient temperature 45 c enclosure type open
docid024214 rev 1 7/46 AN4248 ac_ok setting for brownout 3 ac_ok setting for brownout this pin is used for brownout function when the mains voltage goes below minimum operating level. this is not a latched shutdown. the purpose of this protection feature is to prevent any overheating at the primary side due to brownout condition. a voltage below 0.45 v shuts down (not latched) the ic, lowers its consumption and clears the latch set by latched protections. the ic's operation is re-enabled as the voltage exceeds 0.45 v. the protection is done by using a simple resistor divider network rh and rl. by setting ac_ok pin voltage at 0.45 v with proper selection of divider resistor at < 90 v ac , we can make the controller shut down at desired mains undervoltage level. the brownout comparator is provided with current hysteresis in addition to voltage hysteresis: an internal 15 a current sink is on as long as the voltage applied on the ac_ok pin is such that the ac_fail signal is high. figure 2. brownout protection: internal block diagram the following relationships can be established for the on (vsen on ) and off (vsen off ) thresholds of the sensed voltage: equation 1 from the above relations, we derive the upper resistor and lower resistor values of the divider network as below: equation 2 after calculating, referring to the schematic we have following values : r4 = r9 = r13 = 330 k, r21 = 5.1 k and r22 = 510e approximately. /% $& b )$,/ $&b2. 9ff 9 9 ?$ 5 + 5 / 6hqvhg yrowdjh $09
mains feed-forward setting AN4248 8/46 docid024214 rev 1 4 mains feed-forward setting the vff pin is used to feed the controller the input voltage information and accordingly the internal current sense threshold is decided. the purpose of feed-forward input is to maintain the constant input power of converter throughout the wide mains variation and fixes the output overload current threshold constant throughout the wide mains variations. the linear dynamics of the pin ranges from 0 to 3 v. a voltage higher than 3 v makes the ic stop switching. if vff function is not desired, tie the pin to gnd (pin 3) directly if a latch- mode output ovp is not required (see pin 11, zcd) or through a 10 k min resistor if a latch- mode ovp is required. bypass the pin with a capacitor to gnd (pin 3) to reduce noise pick- up. the following figure shows the internal circuit of the controller for feed-forward function and the variation of current sense threshold (vcsx) versus mains voltage variations (vff signal). figure 3. l6566b mains feed-forward section figure 4. power capability change vs. i nput voltage in qr flyback converters the optimum value of k, k opt , which minimizes the power capability variations over the input voltage range, is the one that provides equal power capability at the extremes of the range. the approximation of this parameter is: $09 9 fv[ >9@ 9 9)) >9@ 9 &203 8sshufodps 5v 5hfwli lhg/lqh9rowdjh 5 5 &203 9)) &6 /% 9 +lffxs 92/7$*( )((' )25:$5' 2swlrqdoiru 293vhwwlqjv 2&3 3:0 9fv[ &orfn=&' $09 9 lq 9 lqplq 3 lqolp # 9 lqplq v\vwhprswlpdoo\ frpshqvdwhg v\vwhpqrw frpshqvdwhg n n n rsw n
docid024214 rev 1 9/46 AN4248 mains feed-forward setting equation 3 where v inmin and v inmax is the rectified dc voltage at minimum and maximum mains voltage. v r is the reflected voltage. the parameter k opt is used to calculate the resistor divider values connected to vff pin (rvff_h and rvff_l), which gives the following values, referring to the schematic (normally same resistor divider network of ac_ok pin can also be used by splitting rvff_l into two values): we have rvff = 1m, rvff_l = 510 e; r4 = r9 = r13 = 330 k, r21 = 5.1 k and r22 = 510e approximately. accordingly, we can calculate the sense resistor value connected at the mosfet source as per the equations below: equation 4 where ipkpmax is the peak drain current at v acmin . we have following parameters in our design: ?v inmin = 90 2 = 127 v ?v inmax = 265 2= 375 v ?i pkp = 2.2 a ?v r = 140 v which gives: k opt = 0.0035 and hence rs = 0.39 . in the schematic r35 = r36 = r29 = 1.2e, r30 = 10e.
mains overvoltage shutdown AN4248 10/46 docid024214 rev 1 5 mains overvoltage shutdown this feature is important to integrate in the smps where supply variations are quite large and to avoid any damage to the converter ensure that the converter stops working when the line voltage goes beyond a certain level. this can be achieved by using various pins, such as the ac_ok , dis or comp pins. in this design, we are implementing the circuit with the ac_ok /comp pin to retain the option of either auto restart or latched shutdown is desired. the user can choose to use the corresponding jumper in the circuit. figure 5. mains overvoltage shutdown implementation using ac_ok pin referring to the above circuit, with a simple bipolar bc547 and resistor divider network, we can generate an inhibit signal to active mains ovp protection: v be_sat = 0.6-0.7 v, taking typical value of 0.65 v we have ?v mains_ovp =300 v ac , means 300 2= 424 vdc ?with r ovph = 1m, r ovp =1.5 k referring to the schematic, we have ? r3 = r8 = r12 = 330 k, r16 = 1.5 k 5rysk 5rys/ %& -xpshu 5 / 5 / 5 / +9,qsxwexv $&b2. 9)) -xpshu 2swlrqdoiru 293vhwwlqjv &203 /% $09
docid024214 rev 1 11/46 AN4248 overload delay and shutdown 6 overload delay and shutdown the soft start (ss) pin is responsible for providing the soft start during startup as well as delayed shutdown during overload period. this is important for some types of loads which require inrush current for a certain duration like printer load. in this design, the appropriate value 100 nf is connected at the ss pin. the time to charge capacitor c17 from 0 v to 2 v sets the soft start time during startup. the time taken is approximated as follows: equation 5 where i ss1 is the current sourced by the internal current generator. in case of overload at output, the capacitor voltage rises above 2 v and when the capacitor voltage reaches 5 v, the device shuts down. but during this time the soft start capacitor is charged with internal current generator at a current of i ss2 = i ss1 / 4. so this amount of time is allowed for overload duration. as the voltage at the soft start capacitor continuous to increase in case of overload and reaches 6.4 v, the device will be latched. to avoid this condition, we normally connect the ss pin to vref via a diode, so that in any case the device voltage is clamped to 5 v+vbe drop = 5.7 v. this is shown in the figure below: figure 6. overload delay circuit $09 66 26& 02'(6& =&' 95() &203 1 6riwvwduwfds
overtemperature shutdown AN4248 12/46 docid024214 rev 1 7 overtemperature shutdown it is very simple to achieve overtemperature shutdown using the dis pin. this protection is latched disabled. we need to recycle the v cc voltage to restart the device. a simple circuit using ntc, which is mounted on the mosfet/rectifier heat sink can be used as shown below. during normal temperature conditions, the voltage at the dis pin is set lower than 4.5 v. as the temperature of the power device increases, ntc resistance falls and voltage at the dis pin starts increasing. as the voltage reaches at 4.5 v, the device gets shut down and latched. figure 7. power discrete thermal shutdown using the dis pin $09 17& 0 . q) q) . &6 ',6 95() &203
docid024214 rev 1 13/46 AN4248 output overvoltage protection (zcd setting) 8 output overvoltage protection (zcd setting) there are two functions of the zcd pin: ? de-magnetizing input in qr operation by taking feedback from auxiliary winding ? sensing output voltage reflection through auxiliary winding and initiate output overvoltage shutdown at desired output ovp level the zero current detection (zcd) and triggering blocks switch on the external mosfet if a negative-going edge falling below 50 mv is applied to the input (pin 11, zcd). to do so the triggering block must be previously armed by a positive-going edge exceeding 100 mv. this feature is usually used for sensing transformer demagnetization in qr operation to start another switching cycle. the signal for the zcd input is obtained from the transformer's auxiliary winding used also to supply the l6566b. the triggering block is blanked for tblank = 2.5 s after mosfet's turnoff to prevent any negative-going edge that follows leakage inductance demagnetization from triggering the zcd circuit erroneously. the same pin also performs ovp protection. the resistor divider network at the zcd pin sets the ovp level where protection is required. if the voltage on the pin exceeds an internal 5 v reference, a comparator is triggered, an overvoltage condition is assumed and the device is shut down. an internal current generator is activated that sources 1 ma out of the vff pin (15). if the vff voltage is allowed to reach 2 vbe over 5 v, the l6566b will be latched off. if the impedance externally connected to pin 15 is so low that the 5+2vbe threshold cannot be reached or if some means is provided to prevent that, the device will be able to restart after the v cc has dropped below 5 v. so in that case this ovp protection by zcd pin will be auto restart type. on the other hand if vff pin is grounded with a 10 k resistor, in that case as soon as zcd senses 5 v due to overvoltage at output, the internal current generator starts providing current to the vff pin and voltage of vff pin reaches 6.4 v. in that case the device gets latched due to output ovp. so both auto restart as well as latched shutdown protections are possible. figure 8. output overvoltage setting using z the cd pin the zcd pin will be connected to the auxiliary winding through a resistor divider rz1, rz2 as shown above. the divider ratio kovp = rz2 / (rz1 + rz2) will be chosen equal to: $09 0rqrvwdeoh 0rqrvwdeoh 6752%( 0 293 &287 s) . 9 wrwuljjhulqj eorfn =&' 5 = 5 =
output overvoltage protection (zcd setting) AN4248 14/46 docid024214 rev 1 equation 6 where ? vout ovp = output voltage level that is to activate the protection ? ns = number of turns of secondary winding ? naux = number of turns of the auxiliary winding the value of rz1 will be such that the current sourced by the zcd pin is within the rated capability of the internal clamp: equation 7 where ?vin max = maximum dc input voltage. referring to the schematic, rz1=r17 and rz2=r25. based on the above relations and transformer turns ratio, r17=47 k and r25=10 k.
docid024214 rev 1 15/46 AN4248 basic power stage calculations 9 basic power stage calculations the power supply specifications are: ?v acmin = 90 v ac ?v acmax = 265 v ac taking the approximate minimum and maximum rectified voltage: ?v inmin = 90 2 = 127 v dc ?v inmax = 265 2 = 374 v dc ?v out = 24 v, i out = 2.5 a maximum output power, p out = v out x i out = 60 w overall system efficiency, = 0.85 minimum switching frequency, f swmin = 60 khz since the operation is qr, the primary inductance of transformer can be calculated with the following equation: equation 8 the converter is operating in dcm. for approximate value, we can simply neglect cd implications, so we have: equation 9 considering the transformer efficiency up to 95%, t = 0.95, we have ? pint = 63 w we approximate, lp = 500 uh. ?p inmax = p out / = 70.5 w peak primary current can be calculated with below equation: equation 10 i pkp = 2.2 a primary duty cycle;
basic power stage calculations AN4248 16/46 docid024214 rev 1 equation 11 d = 0.51 secondary duty cycle: equation 12 d' = 0.43 secondary peak current can be calculated with below equation: equation 13 i pks = 11.63a primary side dc current can be calculated with below equation: equation 14 i dcp = 0.56a output average current: equation 15 i dcs = 2.5 a primary side rms current can be calculated with below equation: equation 16 i rmsp = 0.9 a secondary rms current can be calculated with below equation: equation 17 i rmss = 4.4 a
docid024214 rev 1 17/46 AN4248 basic power stage calculations peak mosfet voltage, vds = v inmax + vr+spike, where vinmax should be taken where mains ovp cut is required, lets take it at 420 v. so v ds = 420+140+100 = 660 v, use an 800 v mosfet to obtain a good, safe margin. select stp10nk80z. rectifier max reverse voltage: equation 18 ?v rev = 96 v ? use 120 v schottky ? select 2xstps20120cfp parallel
transformer specifications AN4248 18/46 docid024214 rev 1 10 transformer specifications 10.1 general description and characteristics ? application type: consumer, home appliance ? transformer type: open ? coil former: horizontal type, 6+6 pins ? max. temp. rise: 45 oc ? max. operating ambient temperature: 50 oc ? mains insulation: in acc. with en60950 10.2 electrical characteristics ? converter topology: qr flyback ? core type: etd34, n87 or equivalent ? typical operating frequency: 100 khz ? primary inductance: 500 h10% at 1 khz-0.25 v (a) ? leakage inductance: 5 h max at 100 khz-0.25 v (b) ? measured between pins 3-1 ? measured between pins 3-1 with secondary windings shorted 10.3 winding details note: secondary windings are wound between primary 1 st half and primary 2 nd half layers. secondary windings a and b are in parallel. table 2. pins winding rms current number of turns wire gauge 3-2 primary 1 st half 0.9 arms 30 4xawg27 9-7 secondary-a 2.3 arms 11 6xawg22 10-8 secondary-b 2.3 arms 11 6xawg22 2-1 primary 1 st half 0.9 arms 30 4xawg27 6-5 auxiliary 0.05 arms 6 1xawg32
docid024214 rev 1 19/46 AN4248 transformer specifications figure 9. transformer windings & termination 10.4 winding construction figure 10. transformer winding construction method $09 $09
control loop AN4248 20/46 docid024214 rev 1 11 control loop opto coupler ctr = 1. required phase margin > 50. figure 11 shows the resulting bode plot with the selection of following compensation values: ?c comp = c21 = 5.6 nf ?r fb. = r31 = 0 e ?c fb = c20 = 330 nf ?r opto = r24 = 1.2 k ?r bias = r27 = 2.2 k figure 11. magnitude and phase plot at 230 v ac , full load 60 w figure 12. magnitude and phase plot at 230 v ac , light load 6 w $09 $09
docid024214 rev 1 21/46 AN4248 control loop figure 13. magnitude and phase plot at 115 v ac , full load 60 w figure 14. magnitude and phase plot at 115 v ac , light load 6 w $09 $09
schematic diagram AN4248 22/46 docid024214 rev 1 12 schematic diagram figure 15. electrical schematic $09 6*1' 3*1' & q) 9 & q) & x) 9 5 . 8 / % +96 1& *1' *' 26& 66 9)) $&b2. 9&& &6 )02' ', 6 =& ' 02' ( 6& 95() &203 5 . *urxqg',6zkhq & x) ixqfwlrqqrwuhtxluhg ' 6736&)3 6*1' 3*1' 3*1' 7 & x) & q) & q) 5 ()ruqrihhgiruzdug 7+ 5 17& & q) 3*1' / x+ 3*1' & q) & q) 9 5 ( ' 677+ 7+ '1/ 3*1' -xpshu & q) 9 5 0 3*1' 5 . & q) - 5 ( ) $ .9< . 5 5. 3*1' 6kruw 5 5 ( - 3&% 8 5. .9< 3*1' 5 . & q) +hdw6lqn 5 17& 0 5 ( 9 & x) & q) 3*1' & x) 4 %& +hdw6lqn ' 1 5 . 9 . 5 = 9 3*1' ' 677+ 5 ( 5 ( .9 & q) 5 ( / x+ 5 . 3*1' 1 & q) 9 5 . 9 5 . ' 677+ / p+ & q) 3*1' 5 . & q) 6*1' 9 5 . & s) 5 . ' 1 $&6xsso \ 3*1' 5 . :&) 5 & q) 5 . 8 7/$&= 5 ( '1/ 3*1' 6*1' 029 9 5 0 / 4 6731.= 67)1. ' 677+ 5 ( '1/ 5 . 5 ( 3*1' 6*1' '1 / 5 ' 6736&)3 & q) ' 677+ 2swlrqd o 3*1' & s) 5 0 6*1' 9 5 . 5 0 5 . & x) 9 5 . ' 6736+ 1rwfrqqhfwhgiruqr2yhuwhpssurwhfwlrq
docid024214 rev 1 23/46 AN4248 bill of material 13 bill of material table 3. bill of material sr no part reference part description make 1 r2 resistor 1 m, smd 1206 2. r7 resistor 1 m, smd 1206 3 r10 resistor 1 m, smd 1206 4 r15 resistor 1 m, smd 1206 5 r3 resistor 330 k, smd 1206 6 r8 resistor 330 k, smd 1206 7 r12 resistor 330 k, smd 1206 8 r4 resistor 330 k, smd 1206 9 r9 resistor 330 k, smd 1206 10 r13 resistor 330 k, smd 1206 11 r16 resistor 1.5 k, smd 1206 12 r21 resistor 5.1 k, smd 1206 13 r22 resistor 510 e, smd 1206 14 r17 resistor 47 k, smd 0805 15 r25 resistor 20k, smd 0805 16 r23 resistor 10k, smd 0805 17 r37 resistor 100k, smd 0805 18 r26 resistor 1 k, smd 0805 19 r28 resistor 1 k, smd 0805 20 r34 resistor 12 k, smd 0805 21 r35 resistor 1.2 e, smd 1206, 1% 22 r36 resistor 1.2 e, smd 1206, 1% 23 r29 resistor 1.2 e, smd 1206, 1% 24 r30 resistor 10 e, smd 1206 25 r18 resistor 10 e, smd 0805 26 r11 resistor 22 e, smd 0805 26 r19 resistor 27 e, smd 0805 27 r20 resistor 47 k, smd 0805 28 r24 resistor 1.2 k, smd 0805 29 r27 resistor 2.2 k, smd 0805 30 r32 resistor 39 k, smd 0805, 1% 31 r38 resistor 4.7 k, smd 0805, 1%
bill of material AN4248 24/46 docid024214 rev 1 32 r5 resistor 56 k, 2 w cfr through hole 33 r39 resistor dnl 34 r6 resistor dnl through hole, 0.25 w 35 r1 resistor 22e, smd 1206 dnl 36 r31 resistor 0e, smd 0805 36 c3 capacitor 220nf/275 v, x2 through hole 37 c6 capacitor 220nf/275 v, x2 through hole 38 c4 capacitor 220nf/275 v, x2 through hole 39 c7 capacitor 220nf/275 v, x2 through hole 40 c2 capacitor ceramic disc type 2.2nf/1 kv through hole 41 c13 capacitor 100nf, 0805 42 c24 capacitor 100nf, 0805 43 c17 capacitor 100nf, 0805 44 c18 capacitor 100nf, 0805 45 c25 capacitor 100nf, 0805 46 c22 capacitor 330pf, 0805 47 c21 capacitor 5.6nf, 0805 48 c19 capacitor 4.7pf, 0805 dnl 49 c23 capacitor 10nf, 0805 50 c16 capacitor 47nf, 0805 51 c20 capacitor 330nf, 0805 52 c1 capacitor 1nf , 1206 dnl 53 c14 capacitor 2.2nf/2 kv, y1 through hole 54 c15 capacitor 2.2nf/2 kv, y1 through hole 55 c5 capacitor elect 220uf/350 v through hole 56 c11 capacitor elect 220uf/350 v through hole 57 c12 capacitor elect 47uf/35 v through hole 58 c8 capacitor elect 1000uf/50 v low esr through hole 59 c9 capacitor elect 1000uf/50 v low esr through hole 60 c10 capacitor elect 100uf/50 v through hole 61 d1 diode stth310, package do-201ad 62 d2 diode stth310, package do-201ad 63 d3 diode stth310, package do-201ad 64 d4 diode stth310, package do-201ad 65 d6 diode stth1r02, package do-41 table 3. bill of material (continued) sr no part reference part description make
docid024214 rev 1 25/46 AN4248 bill of material 66 d5 diode stth108, package do-41 67 d7 diode 1n4148 smd 68 d8 diode 1n4148 smd 69 d9 diode schottky stps20120cfp, package to-220fpab st 70 d10 diode schottky stps20120cfp, package to-220fpab st 71 u1 pwm controller l6566b, package so-16 st 72 u3 reference voltage ic tl431acz, package to-92 st 73 u2 optocoupler pc817b , package dip-4 74 q2 mosfet stp10nk80z, package to-220ac, or stf7n80k5, package to-220fp st 75 q1 transistor bc547, package to-92 76 l1 dc side inductor 470 uh drum type 77 l2 common mode filter 10 mh 78 l3 dc side inductor 4.7 uh drum type 79 t1 transformer etd34 80 f1 mains fuse glass type 4 a 81 r14 ntc 82 r33 ntc m57703 83 mov 510 vrms rated, s10k510 epcos 84 z1 zener 22 v/0.5 w (optional) table 3. bill of material (continued) sr no part reference part description make
test results AN4248 26/46 docid024214 rev 1 14 test results ? average efficiency at full load over entire mains operation: 86.75% ? full load efficiency at nominal input 230 v ac : 88.56% table 4. test results load % v ac (v) i ac (a) pin(w) vo(v) io(a) po(w) % ? 25 100 0.260 17.30 24.47 0.602 14.73 85.15 180 0.163 17.27 24.46 0.602 14.72 85.26 230 0.138 17.80 24.45 0.602 14.72 82.69 265 0.129 18.00 24.45 0.602 14.72 81.77 50 100 0.495 34.10 24.44 1.202 29.38 86.15 180 0.298 33.60 24.42 1.202 29.35 87.36 230 0.250 33.80 24.42 1.201 29.33 86.77 265 0.228 34.00 24.42 1.201 29.33 86.26 75 100 0.752 52.30 24.40 1.807 44.09 84.30 180 0.446 50.01 24.40 1.807 44.09 88.16 230 0.367 50.00 24.39 1.806 44.05 88.10 265 0.330 50.01 24.38 1.806 44.03 88.04 100 100 0.990 70.80 24.30 2.400 58.32 82.37 180 0.574 66.80 24.34 2.404 58.51 87.59 230 0.470 66.10 24.35 2.404 58.54 88.56 265 0.428 66.20 24.36 2.404 58.56 88.46
docid024214 rev 1 27/46 AN4248 functional check 15 functional check the flyback waveforms are analyzed (refer to figure 16 through figure 31 ) during steady- state operation of the smps. the waveforms are captured at different load conditions - 25%, 50%, 75% and 100% at different operating mains voltage, starting from 100 v ac to 265 v ac . note: ch1: drain current; ch2: v cc voltage; ch3: comp pin; ch4: drain-source voltage. figure 16. condition 1: v ac = 100 v; i out = 0.6 a $09
functional check AN4248 28/46 docid024214 rev 1 figure 17. condition 2: v ac = 100 v; i out = 1.2 a figure 18. condition 3: v ac = 100 v; i out = 1.8 a $09 $09
docid024214 rev 1 29/46 AN4248 functional check figure 19. condition 4: v ac = 100 v; i out = 2.4 a figure 20. condition 5: v ac = 180 v; i out = 0.6 a $09 $09
functional check AN4248 30/46 docid024214 rev 1 figure 21. condition 6: v ac = 180 v; i out = 1.2 a figure 22. condition 7: v ac = 180 v; i out = 1.8 a $09 $09
docid024214 rev 1 31/46 AN4248 functional check figure 23. condition 8: v ac = 180 v; i out = 2.4 a figure 24. condition 9: v ac = 230 v; i out = 0.6 a $09 $09
functional check AN4248 32/46 docid024214 rev 1 figure 25. condition 10: v ac = 230 v; i out = 1.2 a figure 26. condition 11: v ac = 230 v; i out = 1.8 a $09 $09
docid024214 rev 1 33/46 AN4248 functional check figure 27. condition 12: v ac = 230 v; i out = 2.4 a figure 28. condition 13: v ac = 265 v; i out = 0.6 a $09 $09
functional check AN4248 34/46 docid024214 rev 1 figure 29. condition 14: v ac = 265 v; i out = 1.2 a figure 30. condition 15: v ac = 265 v; i out = 1.8 a $09 $09
docid024214 rev 1 35/46 AN4248 functional check figure 31. condition 16: v ac = 265 v; i out = 2.4 a $09
holdup test AN4248 36/46 docid024214 rev 1 16 holdup test the mains input is interrupted at loaded conditions to observe the holdup capability of smps. referring to the waveform in figure 32 , the converter is able to deliver the load in case 4 cycles of 50 hz mains supply at 230 v ac are missing. this is important in cases of interruption or dips in the mains supply voltage. the input bulk capacitors should have enough capacitance to ensure no interruption of output power delivery to the load in case of missing ac cycles. a holdup time of at least 2 missing ac cycles (i.e. 40 ms) are enough for any smps to pass this criterion. in the present design, the smps is able to provide more than 2 cycles. 17 soft start test figure 33 shows the output voltage rise at the time the mains supply is supplied to converter. the test is conducted at 230 v ac nominal. 18 short-circuit test the output is short-circuited and the converter is powered at 230 v ac , the power supply enters protection mode. in case of output short, there are two different possible situations that the controller must handle: if the coupling between the secondary winding and the auxiliary winding is good, as soon as the output voltage drops, the auxiliary voltage drops as well and the ic supply voltage falls below the undervoltage lockout threshold, causing the l6566b to stop switching. it remains in the off-state until the voltage on the v cc pin decreases below the v cc restart threshold (5 v), then the hv startup turns on and charges the v cc capacitor; as soon as the turn-on threshold is reached, the converter restarts. if the short is still there, the converter just attempts to restart but it stops for a long period. restart attempts are repeated indefinitely until the short is removed. this provides a very low frequency hiccup working mode, limiting the current flowing at the secondary side (less than 1 arms) preventing the power supply from overheating, which could destroy it. in the case where the coupling between the auxiliary and secondary winding is poor, some spikes on the auxiliary voltage may keep v cc above the uvlo threshold for a period long enough to damage the converter. in this case the l6566b detects a short-circuit by monitoring the control pins: in the case of a short, the comp pin goes high, and an internal comparator activates a current source that restarts charging the soft-start capacitor from the initial 2 v level. if the voltage on this pin reaches 5 v, the l6566b stops operation and it restarts with a startup sequence when the v cc voltage drops below the v cc restart level (5 v), entering into the so-called ?hiccup mode?. figure 34 through figure 37 shows the converter switching behavior during short-circuited output. the waveforms are captured at different time scales to clearly understand the operation during short-circuit.
docid024214 rev 1 37/46 AN4248 short-circuit test in figure 34 , we can observe the behavior of the v cc voltage as described above. in figure 35 , the waveforms are triggered in different time scale, where single switching pulses are spaced with 150 us. figure 36 & 37 displays more clearly the single pulse timing and peak values of drain- source voltage with leakage spike overshoot and peak drain current values. triggered at different levels corresponding to different ton instants. looking to figure 22, maximum drain current is limited to 2.7 a peak approx and there is no saturation effect observed in transformer. the overall operation is safe and average input power from the mains drops to negligible values. figure 32. hold up test ch1: load current 2.4 a max; ch4: ac input 230 v $09
short-circuit test AN4248 38/46 docid024214 rev 1 figure 33. output soft start ch1: load current; ch2: output voltage, 24 vmax figure 34. output short circuit (hiccup mode) $09 $09 &+gudlqfxuuhqw&+9ffyrowdjh&+&203slq&+gudlq vrxufhyrowdjh
docid024214 rev 1 39/46 AN4248 short-circuit test figure 35. switching attempts during hiccup mode figure 36. single switching pulse (v drain and i drain ) $09 &+gudlqfxuuhqw&+9ffyrowdjh&+&203slq&+gudlq vrxufhyrowdjh $09 &+gudlqfxuuhqw&+9ffyrowdjh&+&203slq&+gudlq vrxufhyrowdjh
short-circuit test AN4248 40/46 docid024214 rev 1 figure 37. single switching pulse-no saturation of transformer $09 &+'udlqfxuuhqw&+9ff9rowdjh&+&203slq&+'udl qvrxufhyrowdjh
docid024214 rev 1 41/46 AN4248 burst mode 19 burst mode figure 38 and figure 39 shows the operation of converter during no load conditions. when there is very light load or no load at output, l6566b comp pin voltage goes below 2.65 v, the ic get disabled and power consumption goes is reduced. as soon as comp pin voltage rises above this threshold, the switching attempts takes place. so during this conditions the input power from mains goes in range of mw. the ac input power consumptions are mentioned below at extreme line operating conditions. figure 38. burst mode operation at 100 v ac *,3*5 &+&203slq&+gudlqvrxufhyrowdjhlqsxwsrzhup:
burst mode AN4248 42/46 docid024214 rev 1 figure 39. burst mode operation at 265 v ac note: above no load power consumptions are measured with resistors (r2, r3, r7,r8, r10, r12, r15 & r16) connected at rectified dc bus input and causing additional power losses. the standby losses can be further go down by increasing the value of resistors as well as removing in case no line-line withstanding and mains brownout features are required. *,3*59 &+&203slq&+gudlqvrxufhyrowdjhlqsxwsrzhup:
docid024214 rev 1 43/46 AN4248 temperature rise test 20 temperature rise test the temperature of the main components like power discrete and magnetic are observed until gets saturated at constant level after continuous working of power supply unit. below is the temperature of main components at nominal input of 230 v ac : table 5. temperature rise test location of thermal sensor measured temperature( c) mosfet q2(stp10nk80z) case 51.8 schottky d9, d10 case 64.2 transformer(t1) core 65.0
reference AN4248 44/46 docid024214 rev 1 21 reference ? l6566b datasheet ? an1326: l6565 quasi-resonant controller
docid024214 rev 1 45/46 AN4248 revision history 22 revision history table 6. document revision history date revision changes 08-may-2014 1 initial release.
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